product

One Week Orientation Program on Semiconductor Technology

πŸ“˜ Program Overview

Electronics and Semiconductor Design Techniques are the key pillars of modern industrial, commercial, and IC manufacturing advancements. As India moves toward large-scale electronics manufacturing, practical knowledge from Diploma to Engineering levels becomes essential.

This training program covers VLSI design (pre-silicon), semiconductor packaging (post-silicon), and reliability testing with hands-on exposure.

🎯 Main Objectives
  • Gain knowledge on VLSI system design from FPGA to ASICs.
  • Understand semiconductor tools, synthesis, simulation, verification & implementation.
  • Learn semiconductor packaging and reliability testing.
  • Provide a platform to stimulate new ideas and innovation.

πŸ“š Course Content

A. Introduction to VLSI (2 HRS)
  • Introduction to SSI, LSI, VLSI
  • Discrete Components & IC
  • Electronics Design
  • Advantages of IC
  • Why VLSI? Why Silicon?
  • Fabrication Steps
B. Introduction to HDL’s (VHDL/Verilog) – (4 HRS)
  • Introduction to HDL (Verilog)
  • Why HDL?
  • Design Methodologies
  • Data Types, Syntax Rules
  • Libraries & Packages
  • Modules & Ports
  • Gate-Level, Dataflow Modeling
  • Task & Function
C. Advanced Verilog – (2 HRS)
  • Timing & Delays
  • Switch-Level Modeling
  • User-Defined Primitives
  • Logic Synthesis with Verilog
  • Advanced Verification Techniques
D. CMOS Introduction – (2 HRS)
  • MOS Transistors
  • CMOS Logic
  • MOS Inverters & Interconnect Effects
E. CMOS Layout Design – (2 HRS)
  • Basics of Layout
  • Fabrication of MOSFETs
  • Layout Design of CMOS Inverter, NAND, NOR, XOR
F. FPGA Design – (2 HRS)
  • Introduction to FPGA
  • Programmable Logic & I/O
  • FPGA Architecture & Logic Blocks
  • Programming Methodology
  • FPGA Design Flow
  • CPLD vs FPGA
G. VLSI Projects & Lab Sessions – (6 HRS)

Tools Used: Xilinx & Mentor Graphics

  • Logic Gates: AND, OR, NOR, XOR, NOT
  • Combinational Logic: Half/Full Adder, Mux, Encoder, Decoder
  • Sequential Logic: Flip-Flops, Counters, Shift Registers
  • FSM Design: Sequence Detector, Traffic Light Controller
  • Memory: FIFO, RAM, ROM
  • Processor Design: ALU, Control Unit, 8-bit Processor
  • CMOS Layout of Inverter, NAND, NOR, XOR
H. ASIC Design & Verification – (4 HRS)
  • ASIC Design Flow
  • Verification Flow
  • Testbench Architecture
  • SystemVerilog for Verification
  • Floor Planning, Placement & Routing
  • Clock Tree Synthesis
  • Static Timing Analysis
  • DFT – Design for Test
  • Physical Verification
I. Semiconductor Packaging & Testing – (16 HRS)
  • Length Scales, Transistor Actions, Feature Sizes
  • Moore’s Law & Historical Trends
  • Semiconductor Packaging Anatomy
  • Types of Packages & Reliability
  • Packaging Manufacturing Stages
  • Traditional & Advanced Packaging
  • Process Control Systems
  • Clean Room Practices
  • Safety & Maintenance Procedures
  • Assembly & Test Line Operations
  • PCB Basics & Design
  • Package Design Simulations

πŸ“ Program Venue & Duration

Venue

Online Mode

Date

15th December to 21th December 2025

πŸ“… Program Schedule

Day 1 – 15.12.2025
1000 Hrs – 1030 Hrs Inaugural Session: Setting the Stage
1030 Hrs – 1300 Hrs Introduction to VLSI
1300 Hrs – 1400 Hrs Lunch Break
1400 Hrs – 1700 Hrs Introduction to HDL’s (VHDL/Verilog), Advanced Verilog
Day 2 – 16.12.2025
1000 Hrs – 1300 Hrs CMOS Introduction & Layout Design
1300 Hrs – 1400 Hrs Lunch Break
1400 Hrs – 1700 Hrs FPGA Design
Day 3 – 17.12.2025
1000 Hrs – 1300 Hrs VLSI Projects on Xilinx & Mentor Graphics: Logic Gates, Combinational Logic, Sequential Logic
1300 Hrs – 1400 Hrs Lunch Break
1400 Hrs – 1700 Hrs State Machine Design, Memory
Day 4 – 18.12.2025
1000 Hrs – 1300 Hrs Processor Design, CMOS Design
1300 Hrs – 1400 Hrs Lunch Break
1400 Hrs – 1600 Hrs ASIC Design and Verification Technology
1600 Hrs – 1700 Hrs Leadership Talk on Semiconductor Technology
Day 5 – 19.12.2025
1000 Hrs – 1300 Hrs Semiconductor Packaging and Testing
1300 Hrs – 1400 Hrs Lunch Break
1400 Hrs – 1530 Hrs Pedagogy and Program Conclusion
1530 Hrs – 1700 Hrs Assessment & Certificate Distribution

Who We Are

We are startup company @ Incubation Center, IIT Patna working in the field of Medical Electronics, Embedded system, Micro-electronics, Nano electronics, Internet of Things(IOT) and Robotics and system software related Research & Development, product prototyping and Design servicing. It has been established with an aim to develop center of advanced electronics research & development At SMARTWAY ELECTRONICS, we take pride in design innovation and accept engineering challenges for developing quality products.


Our Offices

Patna Office: Malti Niwas, Road No-1, Dhelwan, Near Bus Stand Bypass Road, Patna-13, Pin: 800030, Email: Smartwayelectronics20@gmail.com, Mob: +91-6299818933

Bangalore Office: Bangalore Bionnovation Centre BS09, Ground Floor, Bangalore Helix Biotech Park, BBC, Electronic City Phase-1, Bangalore- 560100, Mob: +91-8002359537

Mumbai Office: Plot No.177, Shree Niwas, B-301, Sector 14, Nerul (west), Navi Mumbai– 400706, Mob: +91-8108475077


© copyright 2025: Smartway Electronics